/*

Copyright (c) 2010, Shawn McGregor and Steve Mitchell All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

    * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
    * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
    * Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

A6281.h

*/

#include <p18cxxx.h>
#include <pconfig.h>

// Chipset Configuration Settings

// Latch In / Latch Out (Change pins as needed)

#define SB_Latch 		LATCbits.LATC3 
#define SB_Latch_DIR 		TRISCbits.TRISC3

/*
The LI (Latch Input) pin causes the ShiftBrite to accept whatever is in its shift register as a new 
command. If you send the LI pin high and then low after 32 clocks, the first ShiftBrite in the chain 
has all new data from the DI pin. The second ShiftBrite contains whatever was already in the first 
ShiftBrite, and so on. To command all ShiftBrites in a chain, you must toggle the LI pin after you 
have shifted data to all ShiftBrites; 32 clock cycles times the number of ShiftBrites in the chain. 
The LI pin passes through to the LO (Latch Output) pin.
*/

// Data In / Data Out (Change pins as needed)

#define SB_Data 		LATCbits.LATC5 
#define SB_Data_DIR 		TRISCbits.TRISC5

/*
The DI (Data In) pin carries the actual control information into the ShiftBrite. It is the input to 
an internal 32-bit shift register. Every time data is shifted into the controller, the binary value 
on the DI pin is placed in Bit 0 of the shift register, and the value in Bit 31 overflows out the 
DO (Data Out) pin to the next ShiftBrite in the chain. Data is shifted in using MSB (most significant 
bit first).
*/

// Clock In / Clock Out (Change pins as needed)

#define SB_Clock 		LATCbits.LATC4 
#define SB_Clock_DIR 		TRISCbits.TRISC4

/*
The CI (Clock In) pin controls the shifting process. Each time the CI pin is sent to logic high and 
low, data is shifted into the DI pin and out of the DO pin. The CI signal is passed through the 
ShiftBrite to the CO (Clock Output) pin, so the next ShiftBrite can receive the bits from the DO line.
*/

// Enable In / Enable Out (Change pins as needed)

#define SB_Enable 		LATCbits.LATC5 
#define SB_Enable_DIR		TRISCbits.TRISC5

/*
The EI (Enable Input) turns the entire chain on and off. If it is sent to logic high, then it will 
blank all ShiftBrites. When EI is low, all ShiftBrites will display the colors specified previously. 
The EI pin passes through to the EO pin.
*/

// Register Locations



// Code Interface

void shiftbrite_init		(void);
void shiftbrite_rgbchk		(void);
void shiftbrite_color		(unsigned int r, unsigned int g, unsigned int b);

void write1bit			(unsigned char c);
void write8bit			(unsigned char c);
void write10bit			(unsigned int  i);